A abstract view of the implementation of the MIPS subset showing the major functional units and the major connections between them:
The basic implementation of the MIPS subset, including the necessary multiplexors and control lines:
The signal is logically high or true.
The signal is logically low or false.
The approach used to determine when data is valid and stable relative to the clock.
A clocking scheme in which all state changes occur on a clock edge.
A signal used for multiplexor selection or for directing the operation of a functional unit; contrasts with a data signal , which contains information that is operated on by a funcional unit.
The state element is changed only when the write control signal is asserted and a clock edge occurs.